//
sign in
Post
by @danabra.mov
PostEmbed
by @danabra.mov
Record
by @jimpick.com
Record
by @atsui.org
+ new component
Post
2/4 My FPGA project accelerated Cryo-EM, which won a Nobel prize in 2017 but is currently bottlenecked by Nvidia GPUs. I implemented a custom FPGA pipeline using a mix of VHDL and HLS C++, and took some inspiration from Apple Unified Memory and Systolic Arrays in Google TPUs
25d
Michael Reeves